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* Fix compilation issuesSuren A. Chilingaryan2011-07-111-5/+5
* Reorganization of NWL engine, step 1Suren A. Chilingaryan2011-07-111-89/+166
* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-111-319/+39
* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-111-93/+26
* Support dynamic registers, support register offsets and multiregisters (bitma...Suren A. Chilingaryan2011-07-091-8/+67
* Add some check to verify if NWL DMA engine have been successfully initializedSuren A. Chilingaryan2011-07-081-5/+3
* Support alignments in kmem allocationSuren A. Chilingaryan2011-07-061-1/+1
* A bit of renamingSuren A. Chilingaryan2011-07-061-9/+9
* Define addresses of NWL enginesroot2011-07-041-1/+3
* North West Logick DMA implementationroot2011-07-041-102/+560
* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-181-0/+98
* Enumerate DMA enginesroot2011-06-171-0/+178