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| author | zilio nicolas <nicolas.zilio@kit.edu> | 2015-08-26 14:45:18 +0200 |
|---|---|---|
| committer | zilio nicolas <nicolas.zilio@kit.edu> | 2015-08-26 14:45:18 +0200 |
| commit | 1e5f0b6d5e02c0dc11bedefa92fc3c5bb406845a (patch) | |
| tree | a978bd11f64f619ee8f40e42e73a582754c122de /pcilib/pci.h | |
| parent | 0f298bd861ac8d847f33d6b8bc73b089d2749bbb (diff) | |
| parent | 6bad94bb8546a3a5595d340e7a2d809635e3bd5d (diff) | |
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Diffstat (limited to 'pcilib/pci.h')
| -rw-r--r-- | pcilib/pci.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/pcilib/pci.h b/pcilib/pci.h index d176caf..340abd3 100644 --- a/pcilib/pci.h +++ b/pcilib/pci.h @@ -24,6 +24,7 @@ #include "event.h" #include "model.h" #include "export.h" +#include "locking.h" typedef struct { uint8_t max_link_speed, link_speed; @@ -41,6 +42,7 @@ struct pcilib_s { int pci_cfg_space_fd; /**< File descriptor linking to PCI configuration space in sysfs */ uint32_t pci_cfg_space_cache[64]; /**< Cached PCI configuration space */ + size_t pci_cfg_space_size; /**< Size of the cached PCI configuration space, sometimes not fully is available for unpriveledged user */ const uint32_t *pcie_capabilities; /**< PCI Capbility structure (just a pointer at appropriate place in the pci_cfg_space) */ int reg_bar_mapped; /**< Indicates that all BARs used to access registers are mapped */ @@ -70,6 +72,11 @@ struct pcilib_s { pcilib_dma_context_t *dma_ctx; /**< DMA context */ pcilib_context_t *event_ctx; /**< Implmentation context */ + pcilib_lock_t *dma_rlock[PCILIB_MAX_DMA_ENGINES]; /**< Per-engine locks to serialize streaming and read operations */ + pcilib_lock_t *dma_wlock[PCILIB_MAX_DMA_ENGINES]; /**< Per-engine locks to serialize write operations */ + + struct pcilib_locking_s locks; /**< Context of locking subsystem */ + #ifdef PCILIB_FILE_IO int file_io_handle; #endif /* PCILIB_FILE_IO */ |