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authorSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-12 16:35:24 +0200
committerSuren A. Chilingaryan <csa@dside.dyndns.org>2011-07-12 16:35:24 +0200
commite455f83ca2e4ee7c39837309a422732167994cbf (patch)
tree0411940c804b8abf33a2bbaa2c2294c9b77d4bb6 /dma/nwl_loopback.c
parent6c922712fd8ee7e75a1b45c4980be22d36d0d1d9 (diff)
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Separate NWL loopback code, provide DMA start/stop interfaces
Diffstat (limited to 'dma/nwl_loopback.c')
-rw-r--r--dma/nwl_loopback.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/dma/nwl_loopback.c b/dma/nwl_loopback.c
new file mode 100644
index 0000000..9c74b14
--- /dev/null
+++ b/dma/nwl_loopback.c
@@ -0,0 +1,53 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+#include <sys/time.h>
+
+#include "pci.h"
+#include "pcilib.h"
+#include "error.h"
+#include "tools.h"
+#include "nwl.h"
+
+#include "nwl_defines.h"
+
+
+int dma_nwl_start_loopback(nwl_dma_t *ctx, pcilib_dma_direction_t direction, size_t packet_size) {
+ uint32_t val;
+
+ // Re-initializing always
+
+ val = packet_size;
+ nwl_write_register(val, ctx, ctx->base_addr, PKT_SIZE_ADDRESS);
+
+ switch (direction) {
+ case PCILIB_DMA_BIDIRECTIONAL:
+ val = LOOPBACK;
+ break;
+ case PCILIB_DMA_TO_DEVICE:
+ return -1;
+ case PCILIB_DMA_FROM_DEVICE:
+ val = PKTGENR;
+ break;
+ }
+
+ nwl_write_register(val, ctx, ctx->base_addr, TX_CONFIG_ADDRESS);
+ nwl_write_register(val, ctx, ctx->base_addr, RX_CONFIG_ADDRESS);
+
+ ctx->loopback_started = 1;
+
+ return 0;
+}
+
+int dma_nwl_stop_loopback(nwl_dma_t *ctx) {
+ uint32_t val = 0;
+
+ if (ctx->loopback_started) {
+ nwl_write_register(val, ctx, ctx->base_addr, TX_CONFIG_ADDRESS);
+ nwl_write_register(val, ctx, ctx->base_addr, RX_CONFIG_ADDRESS);
+ ctx->loopback_started = 0;
+ }
+
+ return 0;
+}