From 57149189cb4e15ed38ee34d44450390955e56697 Mon Sep 17 00:00:00 2001 From: zilio nicolas Date: Fri, 4 Sep 2015 12:52:07 +0200 Subject: almost finished regarding suren remarks --- models/ipecamera/camera.xml | 923 +++++++++++++++++++++++++++++++ models/ipecamera/registers_and_banks.xsd | 242 ++++++++ 2 files changed, 1165 insertions(+) create mode 100644 models/ipecamera/camera.xml create mode 100755 models/ipecamera/registers_and_banks.xsd (limited to 'models') diff --git a/models/ipecamera/camera.xml b/models/ipecamera/camera.xml new file mode 100644 index 0000000..0188267 --- /dev/null +++ b/models/ipecamera/camera.xml @@ -0,0 +1,923 @@ + + + + + + bank 0 + 0 + 128 + default + 0x9010 + 0x9000 + 8 + little + %lu + cmosis + CMOSIS CMV2000 Registers + + + + 1 + 0 + 16 + 1088 + 0 + RW + cmosis_number_lines + test + + + 3 + 0 + 16 + 0 + 0 + RW + cmosis_start1 + + + 5 + 0 + 16 + 0 + 0 + RW + cmosis_start2 + + + 7 + 0 + 16 + 0 + 0 + RW + cmosis_start3 + + + 9 + 0 + 16 + 0 + 0 + RW + cmosis_start4 + + + 11 + 0 + 16 + 0 + 0 + RW + cmosis_start5 + + + 13 + 0 + 16 + 0 + 0 + RW + cmosis_start6 + + + 15 + 0 + 16 + 0 + 0 + RW + cmosis_start7 + + + 17 + 0 + 16 + 0 + 0 + RW + cmosis_start8 + + + 19 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines1 + + + 21 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines2 + + + 23 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines3 + + + 25 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines4 + + + 27 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines5 + + + 29 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines6 + + + 31 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines7 + + + 33 + 0 + 16 + 0 + 0 + RW + cmosis_number_lines8 + + + 35 + 0 + 16 + 0 + 0 + RW + cmosis_sub_s + + + 37 + 0 + 16 + 0 + 0 + RW + cmosis_sub_a + + + 39 + 0 + 1 + 1 + 0 + RW + cmosis_color + + + 40 + 0 + 2 + 0 + 0 + RW + cmosis_image_flipping + + + 41 + 0 + 2 + 0 + 0 + RW + cmosis_exp_flags + + + 42 + 0 + 24 + 1088 + 0 + RW + cmosis_exp_time + + formuu3 + enumm3 + + + + 45 + 0 + 24 + 1088 + 0 + RW + cmosis_exp_step + + + 48 + 0 + 24 + 1 + 0 + RW + cmosis_exp_kp1 + + + 51 + 0 + 24 + 1 + 0 + RW + cmosis_exp_kp2 + + + 54 + 0 + 2 + 1 + 0 + RW + cmosis_nr_slopes + + + 55 + 0 + 8 + 1 + 0 + RW + cmosis_exp_seq + + + 56 + 0 + 24 + 1088 + 0 + RW + cmosis_exp_time2 + + + 59 + 0 + 24 + 1088 + 0 + RW + cmosis_exp_step2 + + + 68 + 0 + 2 + 1 + 0 + RW + cmosis_nr_slopes2 + + + 69 + 0 + 8 + 1 + 0 + RW + cmosis_exp_seq2 + + + 70 + 0 + 16 + 1 + 0 + RW + cmosis_number_frames + + + 72 + 0 + 2 + 0 + 0 + RW + cmosis_output_mode + + + 78 + 0 + 12 + 85 + 0 + RW + cmosis_training_pattern + + + 80 + 0 + 18 + 0x3FFFF + 0 + RW + cmosis_channel_en + + + 82 + 0 + 3 + 7 + 0 + RW + cmosis_special_82 + + + 89 + 0 + 8 + 96 + 0 + RW + cmosis_vlow2 + + + 90 + 0 + 8 + 96 + 0 + RW + cmosis_vlow3 + + + 100 + 0 + 14 + 16260 + 0 + RW + cmosis_offset + + + 102 + 0 + 2 + 0 + 0 + RW + cmosis_pga + + + 103 + 0 + 8 + 32 + 0 + RW + cmosis_adc_gain + + + 111 + 0 + 1 + 1 + 0 + RW + cmosis_bit_mode + + + 112 + 0 + 2 + 0 + 0 + RW + cmosis_adc_resolution + + + 115 + 0 + 1 + 1 + 0 + RW + cmosis_special_115 + + + + + + bank 1 + 0 + 0x0200 + default + 0x9000 + 0x9000 + 32 + little + 0x%lx + fpga + IPECamera Registers + + + + 0x00 + 0 + 32 + 0 + 0 + RW + spi_conf_input + + + 0x10 + 0 + 32 + 0 + 0 + R + spi_conf_output + + + 0x20 + 0 + 32 + 0 + 0 + RW + spi_clk_speed + + + 0x30 + 0 + 32 + 0 + 0 + R + firmware_info + + + 0 + 8 + R + firmware_version + + + 8 + 1 + R + firmware_bitmode + + + 12 + 2 + R + adc_resolution + + + 16 + 2 + R + output_mode + + + + + 0x40 + 0 + 32 + 0 + 0 + RW + control + + + 31 + 1 + R + freq + + + + + 0x50 + 0 + 32 + 0 + 0 + R + status + + + 0x54 + 0 + 32 + 0 + 0 + R + status2 + + + 0x58 + 0 + 32 + 0 + 0 + R + status3 + + + 0x5c + 0 + 32 + 0 + 0 + R + fr_status + + + 0x70 + 0 + 32 + 0 + 0 + R + start_address + + + 0x74 + 0 + 32 + 0 + 0 + R + end_address + + + 0x78 + 0 + 32 + 0 + 0 + R + rd_address + + + 0xa0 + 0 + 32 + 0 + 0 + R + fr_param1 + + + 0 + 10 + RW + fr_skip_lines + + + 10 + 11 + RW + fr_num_lines + + + 21 + 11 + RW + fr_start_address + + + + + 0xb0 + 0 + 32 + 0 + all bits + RW + fr_param2 + + + 0 + 11 + RW + fr_threshold_start_line + + + 16 + 10 + RW + fr_area_lines + + + + + 0xc0 + 0 + 32 + 0 + 0 + R + skiped_lines + + + 0xd0 + 0 + 32 + 0 + all bits + RW + fr_thresholds + + + 0xd0 + 0 + 10 + 0 + all bits + RW + fr_pixel_thr + + + 0xd0 + 10 + 11 + 0 + all bits + RW + fr_num_pixel_thr + + + 0xd0 + 21 + 11 + 0 + all bits + RW + fr_num_lines_thr + + + 0x100 + 0 + 32 + 0 + 0 + RW + rawdata_pkt_addr + + + 0x110 + 0 + 32 + 0 + 0 + R + temperature_info + + + 0 + 16 + R + sensor_temperature + + formuu1 + formuu2 + enumm2 + + + + 16 + 3 + R + sensor_temperature_alarms + + + 19 + 10 + RW + fpga_temperature + + formuu1 + enumm1 + + + + 29 + 3 + R + fpga_temperature_alarms + + + + + 0x120 + 0 + 32 + 0 + 0 + R + num_lines + + + 0x130 + 0 + 32 + 0 + 0 + R + start_line + + + 0x140 + 0 + 32 + 0 + 0 + R + exp_time + + + 0x150 + 0 + 32 + 0 + 0 + RW + motor + + + 0 + 5 + RW + motor_phi + + + 5 + 5 + RW + motor_z + + + 10 + 5 + RW + motor_y + + + 15 + 5 + RW + motor_x + + + 20 + 8 + R + adc_gain + + + + + 0x160 + 0 + 32 + 0 + 0 + R + write_status + + + 0x170 + 0 + 32 + 0 + 0 + RW + num_triggers + + + 0x180 + 0 + 32 + 0x280 + 0 + RW + trigger_period + + enumm2 + + + + 0x190 + 0 + 32 + 0 + 0 + R + temperature_sample_period + + + 0x1a0 + 0 + 32 + 0x64 + 0 + RW + ddr_max_frames + + + 0x1b0 + 0 + 32 + 0 + 0 + R + ddr_num_frames + + + + + + DMA bank + 0 + 0x0200 + default + 0x0 + 0x0 + 32 + little + 0x%lx + dma + DMA Registers + + + + + + formuu1 + C + (503975./1024000)*@reg - 27315./100 + (@value + 27315./100)*(102400./503975) +formula to get real fpga temperature from the fpga_temperature register in decimal + + + enumm1 + high + low + enum towards temperatures register + + + formuu2 + C + ((1./4)*(@reg - 1200)) if @freq==0 else ((3./10)*(@reg - 1000)) + 4*@value + 1200 if @freq==0 else (10./3)*@value + 1000 + formula to get real sensor temperature from the sensor_temperature register in decimal + + + enumm2 + high + low + enum towards sensor_temperature register + + + formuu3 + us + (@reg+(43./100))*129./(40*1000000)if @freq==0 else (@reg+(43./100))*129./(48*1000000) + @value/129.*(40*1000000) - 43./100 if @freq==0 else @value/129.*(48*1000000) - 43./100 + formula to get real exposure time from the cmosis_exp_time register in decimal + + + enumm3 + short + mid + long + enum towards cmosis_exp_register register + + + diff --git a/models/ipecamera/registers_and_banks.xsd b/models/ipecamera/registers_and_banks.xsd new file mode 100755 index 0000000..10d49b7 --- /dev/null +++ b/models/ipecamera/registers_and_banks.xsd @@ -0,0 +1,242 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- cgit v1.2.3