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* First iteration of work to preserve DMA state between executionsSuren A. Chilingaryan2011-07-1417-215/+347
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* Support modifications of DMA engine and allow DMA customizations by Event engineSuren A. Chilingaryan2011-07-1412-96/+123
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* Add timeout to pcilib_skip_dmaSuren A. Chilingaryan2011-07-141-4/+21
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* Support iterations argument and fix interpretation of size argument for ↵Suren A. Chilingaryan2011-07-131-6/+14
| | | | benchmarking
* Report writted register in hex if it was specified in hexSuren A. Chilingaryan2011-07-121-3/+23
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* Few fixesSuren A. Chilingaryan2011-07-124-14/+34
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* Separate NWL loopback code, provide DMA start/stop interfacesSuren A. Chilingaryan2011-07-1211-82/+181
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* Another reorganization of NWL sourcesSuren A. Chilingaryan2011-07-127-286/+302
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* Provide IRQ enable/disable callSuren A. Chilingaryan2011-07-1210-30/+171
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* Suppport DMA modes in console application (not functional yet)Suren A. Chilingaryan2011-07-1212-33/+233
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* Few fixesSuren A. Chilingaryan2011-07-122-8/+25
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* Fix compilation issuesSuren A. Chilingaryan2011-07-113-8/+8
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* Reorganization of NWL engine, step 1Suren A. Chilingaryan2011-07-115-128/+176
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* Wait for the completion of DMA operations during writesSuren A. Chilingaryan2011-07-119-349/+431
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* Minor improvementSuren A. Chilingaryan2011-07-111-7/+7
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* Change cli parameters (reserve -t parameter for future use as timeout)Suren A. Chilingaryan2011-07-111-25/+41
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* IRQ support in NWL DMA engineSuren A. Chilingaryan2011-07-1118-206/+306
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* Support dynamic registers, support register offsets and multiregisters ↵Suren A. Chilingaryan2011-07-0916-202/+468
| | | | (bitmasks), list NWL DMA registers
* Add some check to verify if NWL DMA engine have been successfully initializedSuren A. Chilingaryan2011-07-081-5/+3
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* Support alignments in kmem allocationSuren A. Chilingaryan2011-07-063-12/+21
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* Fix segmentation failure in DMA access modeSuren A. Chilingaryan2011-07-061-1/+5
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* Compilation fixSuren A. Chilingaryan2011-07-061-4/+4
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* A bit of renamingSuren A. Chilingaryan2011-07-069-55/+51
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* Include type in the register descriptionSuren A. Chilingaryan2011-07-063-60/+62
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* Support FIFO reading/writting, code restructurization, few fixesSuren A. Chilingaryan2011-07-0611-571/+785
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* Define addresses of NWL enginesroot2011-07-041-1/+3
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* North West Logick DMA implementationroot2011-07-0422-227/+1367
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* DMA engine initialization and basic intrastructure for DMA read/writeroot2011-06-185-27/+189
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* Enumerate DMA enginesroot2011-06-179-25/+255
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* New reset routineroot2011-06-161-3/+3
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* A bit of DMA infrastructureroot2011-06-167-24/+126
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* Remove unsupported devicesroot2011-06-164-83/+8
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* Move to new FPGA designroot2011-06-168-82/+179
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* 32 bit fixSuren A. Chilingaryan2011-06-071-1/+1
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* Do not crash if model is not definedSuren A. Chilingaryan2011-05-181-6/+8
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* Some improvements in error handlingSuren A. Chilingaryan2011-05-031-12/+40
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* Multiline grabbingSuren A. Chilingaryan2011-05-031-135/+180
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* A bit faster datacpySuren A. Chilingaryan2011-05-021-10/+17
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* Alternative way to overcome problem with address verification of CMOSIS ↵Suren A. Chilingaryan2011-04-141-24/+26
| | | | registers
* Rearrange channels to get proper imageSuren A. Chilingaryan2011-04-141-4/+20
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* Introduce pcilib_context_t type instead pointer to voidSuren A. Chilingaryan2011-04-145-34/+35
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* Accept timeout parameter to get_next_event callSuren A. Chilingaryan2011-04-144-7/+12
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* Support non-callback way of getting eventsSuren A. Chilingaryan2011-04-145-2/+65
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* Fix order of pixels, temporaly disable some checks to work with current FPGA ↵Suren A. Chilingaryan2011-04-141-9/+44
| | | | code, store raw data
* Set correct hexdecimal values of registers during IPECamera reset and ↵Suren A. Chilingaryan2011-04-131-13/+19
| | | | readout (I was setting them as decimals before)
* Support simplified mode (slow) of writting CMOSIS sensors: issue 3 writes + ↵Suren A. Chilingaryan2011-04-131-23/+84
| | | | delays and when start looking for status
* Support quiete mode to suppress warningsSuren A. Chilingaryan2011-04-131-2/+14
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* Add special CMOSIS registersSuren A. Chilingaryan2011-04-131-0/+2
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* Really fix setting registers with access mode equal to 32 (size of ↵Suren A. Chilingaryan2011-04-131-2/+2
| | | | pcilib_register_value_t)
* clean upSuren A. Chilingaryan2011-04-123-2/+3
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