diff options
Diffstat (limited to 'models')
| -rw-r--r-- | models/ipecamera/camera.xml | 920 | ||||
| -rwxr-xr-x | models/ipecamera/registers_and_banks.xsd | 241 |
2 files changed, 0 insertions, 1161 deletions
diff --git a/models/ipecamera/camera.xml b/models/ipecamera/camera.xml deleted file mode 100644 index 288f6a4..0000000 --- a/models/ipecamera/camera.xml +++ /dev/null @@ -1,920 +0,0 @@ -<?xml version="1.0" encoding="ISO-8859-1"?> -<model xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> - <banks> - <bank> - <bank_description> - <bar>0</bar> - <size>128</size> - <protocol>default</protocol> - <read_address>0x9010</read_address> - <write_address>0x9000</write_address> - <word_size>8</word_size> - <endianess>little</endianess> - <format>%lu</format> - <name>cmosis</name> - <description>CMOSIS CMV2000 Registers</description> - </bank_description> - <registers> - <register> - <address>1</address> - <offset>0</offset> - <size>16</size> - <default>1088</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines</name> - <description>test</description> - </register> - <register> - <address>3</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start1</name> - </register> - <register> - <address>5</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start2</name> - </register> - <register> - <address>7</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start3</name> - </register> - <register> - <address>9</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start4</name> - </register> - <register> - <address>11</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start5</name> - </register> - <register> - <address>13</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start6</name> - </register> - <register> - <address>15</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start7</name> - </register> - <register> - <address>17</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_start8</name> - </register> - <register> - <address>19</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines1</name> - </register> - <register> - <address>21</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines2</name> - </register> - <register> - <address>23</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines3</name> - </register> - <register> - <address>25</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines4</name> - </register> - <register> - <address>27</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines5</name> - </register> - <register> - <address>29</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines6</name> - </register> - <register> - <address>31</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines7</name> - </register> - <register> - <address>33</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_lines8</name> - </register> - <register> - <address>35</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_sub_s</name> - </register> - <register> - <address>37</address> - <offset>0</offset> - <size>16</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_sub_a</name> - </register> - <register> - <address>39</address> - <offset>0</offset> - <size>1</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_color</name> - </register> - <register> - <address>40</address> - <offset>0</offset> - <size>2</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_image_flipping</name> - </register> - <register> - <address>41</address> - <offset>0</offset> - <size>2</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_flags</name> - </register> - <register> - <address>42</address> - <offset>0</offset> - <size>24</size> - <default>1088</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_time</name> - <views> - <view>formuu3</view> - <view>enumm3</view> - </views> - </register> - <register> - <address>45</address> - <offset>0</offset> - <size>24</size> - <default>1088</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_step</name> - </register> - <register> - <address>48</address> - <offset>0</offset> - <size>24</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_kp1</name> - </register> - <register> - <address>51</address> - <offset>0</offset> - <size>24</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_kp2</name> - </register> - <register> - <address>54</address> - <offset>0</offset> - <size>2</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_nr_slopes</name> - </register> - <register> - <address>55</address> - <offset>0</offset> - <size>8</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_seq</name> - </register> - <register> - <address>56</address> - <offset>0</offset> - <size>24</size> - <default>1088</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_time2</name> - </register> - <register> - <address>59</address> - <offset>0</offset> - <size>24</size> - <default>1088</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_step2</name> - </register> - <register> - <address>68</address> - <offset>0</offset> - <size>2</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_nr_slopes2</name> - </register> - <register> - <address>69</address> - <offset>0</offset> - <size>8</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_exp_seq2</name> - </register> - <register> - <address>70</address> - <offset>0</offset> - <size>16</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_number_frames</name> - </register> - <register> - <address>72</address> - <offset>0</offset> - <size>2</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_output_mode</name> - </register> - <register> - <address>78</address> - <offset>0</offset> - <size>12</size> - <default>85</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_training_pattern</name> - </register> - <register> - <address>80</address> - <offset>0</offset> - <size>18</size> - <default>0x3FFFF</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_channel_en</name> - </register> - <register> - <address>82</address> - <offset>0</offset> - <size>3</size> - <default>7</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_special_82</name> - </register> - <register> - <address>89</address> - <offset>0</offset> - <size>8</size> - <default>96</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_vlow2</name> - </register> - <register> - <address>90</address> - <offset>0</offset> - <size>8</size> - <default>96</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_vlow3</name> - </register> - <register> - <address>100</address> - <offset>0</offset> - <size>14</size> - <default>16260</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_offset</name> - </register> - <register> - <address>102</address> - <offset>0</offset> - <size>2</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_pga</name> - </register> - <register> - <address>103</address> - <offset>0</offset> - <size>8</size> - <default>32</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_adc_gain</name> - </register> - <register> - <address>111</address> - <offset>0</offset> - <size>1</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_bit_mode</name> - </register> - <register> - <address>112</address> - <offset>0</offset> - <size>2</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_adc_resolution</name> - </register> - <register> - <address>115</address> - <offset>0</offset> - <size>1</size> - <default>1</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>cmosis_special_115</name> - </register> - </registers> - </bank> - <bank> - <bank_description> - <bar>0</bar> - <size>0x0200</size> - <protocol>default</protocol> - <read_address>0x9000</read_address> - <write_address>0x9000</write_address> - <word_size>32</word_size> - <endianess>little</endianess> - <format>0x%lx</format> - <name>fpga</name> - <description>IPECamera Registers</description> - </bank_description> - <registers> - <register> - <address>0x00</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>spi_conf_input</name> - </register> - <register> - <address>0x10</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>spi_conf_output</name> - </register> - <register> - <address>0x20</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>spi_clk_speed</name> - </register> - <register> - <address>0x30</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>firmware_info</name> - <registers_bits> - <register_bits> - <offset>0</offset> - <size>8</size> - <mode>R</mode> - <name>firmware_version</name> - </register_bits> - <register_bits> - <offset>8</offset> - <size>1</size> - <mode>R</mode> - <name>firmware_bitmode</name> - </register_bits> - <register_bits> - <offset>12</offset> - <size>2</size> - <mode>R</mode> - <name>adc_resolution</name> - </register_bits> - <register_bits> - <offset>16</offset> - <size>2</size> - <mode>R</mode> - <name>output_mode</name> - </register_bits> - </registers_bits> - </register> - <register> - <address>0x40</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>control</name> - <registers_bits> - <register_bits> - <offset>31</offset> - <size>1</size> - <mode>R</mode> - <name>freq</name> - </register_bits> - </registers_bits> - </register> - <register> - <address>0x50</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>status</name> - </register> - <register> - <address>0x54</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>status2</name> - </register> - <register> - <address>0x58</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>status3</name> - </register> - <register> - <address>0x5c</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>fr_status</name> - </register> - <register> - <address>0x70</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>start_address</name> - </register> - <register> - <address>0x74</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>end_address</name> - </register> - <register> - <address>0x78</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>rd_address</name> - </register> - <register> - <address>0xa0</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>fr_param1</name> - <registers_bits> - <register_bits> - <offset>0</offset> - <size>10</size> - <mode>RW</mode> - <name>fr_skip_lines</name> - </register_bits> - <register_bits> - <offset>10</offset> - <size>11</size> - <mode>RW</mode> - <name>fr_num_lines</name> - </register_bits> - <register_bits> - <offset>21</offset> - <size>11</size> - <mode>RW</mode> - <name>fr_start_address</name> - </register_bits> - </registers_bits> - </register> - <register> - <address>0xb0</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>all bits</rwmask> - <mode>RW</mode> - <name>fr_param2</name> - <registers_bits> - <register_bits> - <offset>0</offset> - <size>11</size> - <mode>RW</mode> - <name>fr_threshold_start_line</name> - </register_bits> - <register_bits> - <offset>16</offset> - <size>10</size> - <mode>RW</mode> - <name>fr_area_lines</name> - </register_bits> - </registers_bits> - </register> - <register> - <address>0xc0</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>skiped_lines</name> - </register> - <register> - <address>0xd0</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>all bits</rwmask> - <mode>RW</mode> - <name>fr_thresholds</name> - </register> - <register> - <address>0xd0</address> - <offset>0</offset> - <size>10</size> - <default>0</default> - <rwmask>all bits</rwmask> - <mode>RW</mode> - <name>fr_pixel_thr</name> - </register> - <register> - <address>0xd0</address> - <offset>10</offset> - <size>11</size> - <default>0</default> - <rwmask>all bits</rwmask> - <mode>RW</mode> - <name>fr_num_pixel_thr</name> - </register> - <register> - <address>0xd0</address> - <offset>21</offset> - <size>11</size> - <default>0</default> - <rwmask>all bits</rwmask> - <mode>RW</mode> - <name>fr_num_lines_thr</name> - </register> - <register> - <address>0x100</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>rawdata_pkt_addr</name> - </register> - <register> - <address>0x110</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>temperature_info</name> - <registers_bits> - <register_bits> - <offset>0</offset> - <size>16</size> - <mode>R</mode> - <name>sensor_temperature</name> - <views> - <view>formuu1</view> - <view>formuu2</view> - <view>enumm2</view> - </views> - </register_bits> - <register_bits> - <offset>16</offset> - <size>3</size> - <mode>R</mode> - <name>sensor_temperature_alarms</name> - </register_bits> - <register_bits> - <offset>19</offset> - <size>10</size> - <mode>RW</mode> - <name>fpga_temperature</name> - <views> - <view>formuu1</view> - <view>enumm1</view> - </views> - </register_bits> - <register_bits> - <offset>29</offset> - <size>3</size> - <mode>R</mode> - <name>fpga_temperature_alarms</name> - </register_bits> - </registers_bits> - </register> - <register> - <address>0x120</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>num_lines</name> - </register> - <register> - <address>0x130</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>start_line</name> - </register> - <register> - <address>0x140</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>exp_time</name> - </register> - <register> - <address>0x150</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>motor</name> - <registers_bits> - <register_bits> - <offset>0</offset> - <size>5</size> - <mode>RW</mode> - <name>motor_phi</name> - </register_bits> - <register_bits> - <offset>5</offset> - <size>5</size> - <mode>RW</mode> - <name>motor_z</name> - </register_bits> - <register_bits> - <offset>10</offset> - <size>5</size> - <mode>RW</mode> - <name>motor_y</name> - </register_bits> - <register_bits> - <offset>15</offset> - <size>5</size> - <mode>RW</mode> - <name>motor_x</name> - </register_bits> - <register_bits> - <offset>20</offset> - <size>8</size> - <mode>R</mode> - <name>adc_gain</name> - </register_bits> - </registers_bits> - </register> - <register> - <address>0x160</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>write_status</name> - </register> - <register> - <address>0x170</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>num_triggers</name> - </register> - <register> - <address>0x180</address> - <offset>0</offset> - <size>32</size> - <default>0x280</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>trigger_period</name> - <views> - <view>enumm2</view> - </views> - </register> - <register> - <address>0x190</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>temperature_sample_period</name> - </register> - <register> - <address>0x1a0</address> - <offset>0</offset> - <size>32</size> - <default>0x64</default> - <rwmask>0</rwmask> - <mode>RW</mode> - <name>ddr_max_frames</name> - </register> - <register> - <address>0x1b0</address> - <offset>0</offset> - <size>32</size> - <default>0</default> - <rwmask>0</rwmask> - <mode>R</mode> - <name>ddr_num_frames</name> - </register> - </registers> - </bank> - <bank> - <bank_description> - <bar>0</bar> - <size>0x0200</size> - <protocol>default</protocol> - <read_address>0x0</read_address> - <write_address>0x0</write_address> - <word_size>32</word_size> - <endianess>little</endianess> - <format>0x%lx</format> - <name>dma</name> - <description>DMA Registers</description> - </bank_description> - </bank> - </banks> - <views> - <view type="formula"> - <name>formuu1</name> - <unit>C</unit> - <read_from_register>(503975./1024000)*@reg - 27315./100</read_from_register> - <write_to_register>(@value + 27315./100)*(102400./503975)</write_to_register> -<description>formula to get real fpga temperature from the fpga_temperature register in decimal</description> - </view> - <view type="enum"> - <name>enumm1</name> - <enum value="0x100" min="0x2" max="0x300">high</enum> - <enum value="0x010">low</enum> - <description>enum towards temperatures register</description> - </view> - <view type="formula"> - <name>formuu2</name> - <unit>C</unit> - <read_from_register>((1./4)*(@reg - 1200)) if @freq==0 else ((3./10)*(@reg - 1000))</read_from_register> - <write_to_register>4*@value + 1200 if @freq==0 else (10./3)*@value + 1000</write_to_register> - <description>formula to get real sensor temperature from the sensor_temperature register in decimal</description> - </view> - <view type="enum"> - <name>enumm2</name> - <enum value="0x120">high</enum> - <enum value="0x010" min="0x00" max="0x020">low</enum> - <description>enum towards sensor_temperature register</description> - </view> - <view type="formula"> - <name>formuu3</name> - <unit>us</unit> - <read_from_register>(@reg+(43./100))*129./(40*1000000)if @freq==0 else (@reg+(43./100))*129./(48*1000000)</read_from_register> - <write_to_register>@value/129.*(40*1000000) - 43./100 if @freq==0 else @value/129.*(48*1000000) - 43./100</write_to_register> - <description>formula to get real exposure time from the cmosis_exp_time register in decimal</description> - </view> - <view type="enum"> - <name>enumm3</name> - <enum value="0x000">short</enum> - <enum value="0x010">mid</enum> - <enum value="0x100" min="0x0F0">long</enum> - <description>enum towards cmosis_exp_register register</description> - </view> - </views> -</model> diff --git a/models/ipecamera/registers_and_banks.xsd b/models/ipecamera/registers_and_banks.xsd deleted file mode 100755 index 234cc05..0000000 --- a/models/ipecamera/registers_and_banks.xsd +++ /dev/null @@ -1,241 +0,0 @@ -<?xml version="1.0" encoding="ISO-8859-1"?> -<xsd:schema xmlns:xsd="http://www.w3.org/2001/XMLSchema"> - - <xsd:element name="model"> - <xsd:complexType> - <xsd:sequence> - <xsd:element name="banks" type="banks_type"/> - <xsd:element name="views" type="views_type" minOccurs="0" maxOccurs="1"/> - </xsd:sequence> - </xsd:complexType> - <xsd:key name="Registerkey"> - <xsd:selector xpath="views/view/name"/> - <xsd:field xpath="."/> - </xsd:key> - <xsd:keyref refer="Registerkey" name="RegisterkeyRef"> - <xsd:selector xpath="banks/bank/registers/register/views/view"/> - <xsd:field xpath="."/> - </xsd:keyref> - <xsd:key name="Registerbitskey"> - <xsd:selector xpath="views/view/name"/> - <xsd:field xpath="."/> - </xsd:key> - <xsd:keyref refer="Registerbitskey" name="RegisterbitskeyRef"> - <xsd:selector xpath="banks/bank/registers/register/registers_bits/register_bits/views/view"/> - <xsd:field xpath="."/> - </xsd:keyref> - </xsd:element> - - - <xsd:complexType name="views_type"> - <xsd:sequence> - <xsd:element name="view" type="view_type" maxOccurs="unbounded"/> - </xsd:sequence> - </xsd:complexType> - - - <xsd:complexType name="banks_type"> - <xsd:sequence> - <xsd:element name="bank" type="banktype" minOccurs="1" maxOccurs="12"/> - </xsd:sequence> - </xsd:complexType> - - <xsd:complexType name="banktype"> - <xsd:sequence> - <xsd:element name="bank_description" type="bank_description_t"/> - <xsd:element name="registers" type="registerstype" minOccurs="0" maxOccurs="1"/> - </xsd:sequence> - </xsd:complexType> - - <xsd:complexType name="bank_description_t"> - <xsd:sequence> - <xsd:element name="bar" type="bar_type"/> - <xsd:element name="size" type="hexa_and_integer64_t"/> - <xsd:element name="protocol" type="xsd:string"/> - <xsd:element name="read_address" type="hex64_t"/> - <xsd:element name="write_address" type="hex64_t"/> - <xsd:element name="word_size" type="uint8_t"/> - <xsd:element name="endianess" type="endianess_type"/> - <xsd:element name="format" type="xsd:string"/> - <xsd:element name="name" type="xsd:string"/> - <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> - </xsd:sequence> - </xsd:complexType> - - - <xsd:complexType name="registerstype"> - <xsd:sequence> - <xsd:element name="register" type="register_type" minOccurs="0" maxOccurs="256"/> - </xsd:sequence> - </xsd:complexType> - - <xsd:complexType name="register_type"> - <xsd:sequence> - <xsd:element name="address" type="hexa_and_integer32_t"/> - <xsd:element name="offset" type="uint8_t"/> - <xsd:element name="size" type="uint8_t"/> - <xsd:element name="default" type="hexa_and_integer32_t"/> - <xsd:element name="rwmask" type="rwmask_type"/> - <xsd:element name="mode" type="pcilib_register_mode_t"/> - <xsd:element name="name" type="xsd:string"/> - <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> - <xsd:element name="views" type="reg_to_views_type" minOccurs="0" maxOccurs="1"/> - <xsd:element name="registers_bits" type="registers_bits_type" minOccurs="0" maxOccurs="1"/> - <xsd:element name="value_min" type="hexa_and_integer32_t" minOccurs="0" maxOccurs="1"/> - <xsd:element name="value_max" type="hexa_and_integer32_t" minOccurs="0" maxOccurs="1"/> - </xsd:sequence> - </xsd:complexType> - - <xsd:complexType name="registers_bits_type"> - <xsd:sequence> - <xsd:element name="register_bits" type="register_bits_type" minOccurs="1" maxOccurs="32"/> - </xsd:sequence> - </xsd:complexType> - - <xsd:complexType name="reg_to_views_type"> - <xsd:sequence> - <xsd:element name="view" type="xsd:string" minOccurs="1" maxOccurs="unbounded"/> - </xsd:sequence> - </xsd:complexType> - - <xsd:complexType name="register_bits_type"> - <xsd:sequence> - <xsd:element name="offset" type="uint8_t"/> - <xsd:element name="size" type="uint8_t"/> - <xsd:element name="mode" type="pcilib_register_mode_t"/> - <xsd:element name="name" type="xsd:string"/> - <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> - <xsd:element name="views" type="reg_to_views_type" minOccurs="0" maxOccurs="1"/> - </xsd:sequence> - - </xsd:complexType> - - <xsd:simpleType name="uint8_t"> - <xsd:restriction base="xsd:integer"> - <xsd:minInclusive value="0"/> - <xsd:maxInclusive value="255"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="size_t"> - <xsd:restriction base="xsd:integer"> - <xsd:minInclusive value="0"/> - <xsd:maxInclusive value="18446744073709551615"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="uintptr_t"> - <xsd:restriction base="xsd:integer"> - <xsd:minInclusive value="0"/> - <xsd:maxInclusive value="18446744073709551615"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="uint32_t"> - <xsd:restriction base="xsd:integer"> - <xsd:minInclusive value="0"/> - <xsd:maxInclusive value="4294967295"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="pcilib_register_mode_t"> - <xsd:restriction base="xsd:string"> - <xsd:enumeration value="R"/> - <xsd:enumeration value="W"/> - <xsd:enumeration value="RW"/> - <xsd:enumeration value="W1C"/> - <xsd:enumeration value="RW1C"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="bank_adress_type"> - <xsd:restriction base="xsd:string"> - <xsd:enumeration value="bank 0"/> - <xsd:enumeration value="bank 1"/> - <xsd:enumeration value="bank 2"/> - <xsd:enumeration value="bank 3"/> - <xsd:enumeration value="DMA bank"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="endianess_type"> - <xsd:restriction base="xsd:string"> - <xsd:enumeration value="little"/> - <xsd:enumeration value="big"/> - <xsd:enumeration value="host"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="bar_type"> - <xsd:restriction base="xsd:integer"> - <xsd:enumeration value="0"/> - <xsd:enumeration value="1"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="space_adress_type"> - <xsd:restriction base="xsd:string"> - <xsd:enumeration value="write adress"/> - <xsd:enumeration value="read adress"/> - <xsd:enumeration value="space adress"/> - <xsd:enumeration value="0"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="rwmask_type"> - <xsd:restriction base="xsd:string"> - <xsd:enumeration value="all bits"/> - <xsd:enumeration value="0"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="hexa_and_integer32_t"> - <xsd:union memberTypes="uint32_t hex32_t"/> - </xsd:simpleType> - - <xsd:simpleType name="hex32_t"> - <xsd:restriction base="xsd:string"> - <xsd:pattern value="0x([a-fA-F0-9]){0,8}"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:simpleType name="hexa_and_integer64_t"> - <xsd:union memberTypes="size_t hex64_t"/> - </xsd:simpleType> - - <xsd:simpleType name="hex64_t"> - <xsd:restriction base="xsd:string"> - <xsd:pattern value="0x([a-fA-F0-9]){0,16}"/> - </xsd:restriction> - </xsd:simpleType> - - <xsd:complexType name="view_type"> - <xsd:sequence> - <xsd:element name="name" type="xsd:ID"/> - <xsd:element name="unit" type="xsd:string" minOccurs="0" maxOccurs="1"/> - <xsd:element name="read_from_register" type="xsd:string" minOccurs="0" maxOccurs="1"/> - <xsd:element name="write_to_register" type="xsd:string" minOccurs="0" maxOccurs="1"/> - <xsd:element name="enum" type="enum_t" minOccurs="0" maxOccurs="unbounded"/> - <xsd:element name="description" type="xsd:string"/> - </xsd:sequence> - <xsd:attribute name="type" type="viewtype_type" use="required"/> - </xsd:complexType> - - <xsd:complexType name="enum_t"> - <xsd:simpleContent> - <xsd:extension base="xsd:string"> - <xsd:attribute name="value" type="hexa_and_integer64_t" use="required"/> - <xsd:attribute name="min" type="hexa_and_integer64_t"/> - <xsd:attribute name="max" type="hexa_and_integer64_t"/> - </xsd:extension> - </xsd:simpleContent> - </xsd:complexType> - - <xsd:simpleType name="viewtype_type"> - <xsd:restriction base="xsd:string"> - <xsd:enumeration value="enum"/> - <xsd:enumeration value="formula"/> - </xsd:restriction> - </xsd:simpleType> - -</xsd:schema> |